/////////////////////////////
/////该程序实现1s为周期的分频
//////////////////////////////
module div(clock,rst,clk_out);
input clock,rst;
output clk_out;
reg clk_out;
reg [25:0] m;
always@(posedge clock)
begin
	if(!rst) //按键按下时复位
	begin  clk_out<=0; m<=0; end
	else
	begin 
		m<=m+1;
		if(m==24999999) begin  clk_out<=~clk_out; end
		else 	if(m==49999999) begin m<=0; clk_out<=~clk_out; end
	end
end
endmodule